High Bandwidth Memory (HBM)
High-bandwidth stacked DRAM standard used with GPUs and AI accelerators.
HBM4 doubles bandwidth per package and still can't share capacity across a rack. The two architectural answers, pooled DRAM over CXL and compute pushed next to memory, are at very different stages of readiness.
Apple cut Mac memory ceilings and delayed M5 Ultra by four months as HBM production for data center AI consumes edge LPDDR5X allocation.
Samsung, SK hynix, and Micron converged on SOCAMM2 mass production within six weeks for NVIDIA's Vera Rubin. Korean suppliers now control both memory tiers.
HBM scarcity has moved beyond semiconductor supply into system planning. Accelerator availability, server bill-of-materials, cluster economics, and 2026 data center buildouts are all being rewritten around memory - not compute.