OCP Maps the Co-Packaged Optics Stack. Photonic Die Testing Remains an Open Problem.

Lightmatter and 18 partner companies today formally launched the Open Silicon Photonics for AI Systems workstream inside the Open Compute Project. The launch converts a March announcement into an official OCP effort with 19 member companies and a 294-page white paper to anchor it. Alongside the rack architecture it proposes, "Architecture Vision: Open Silicon Photonics for AI Systems" includes a governance map, Appendix B, that walks system construction layer by layer, wafer to burn-in, and names the standards body or MSA responsible for each.

One row stands out. "One layer on this map is not yet fully owned by any existing organization," the paper states in its standards-alignment section (p. 205). The layer is photonic known-good die, the wafer-level manufacturing-test step, which Appendix B highlights as "currently unowned" (p. 228). The claim is narrower than it sounds: it means the paper can assign no single organization to that row, not that no test work exists anywhere, and it describes the absence of a designated owner rather than any formal industry-wide governance. Still, it is a candid line in a document whose whole method is assigning owners. And it landed the same week manufacturing-test engineers described the same gap from the factory floor.

A tray contract, not another spec

The workstream's claimed territory is deliberately narrow. It defines a vendor-neutral architecture for front-panel, near-package, and co-packaged optics in OCP's Modular Hardware System: a tray contract specified across five dimensions, mechanical, power, high-speed signaling, thermal, and management. Target scale runs from 72-XPU racks to clusters of 1,024 nodes and beyond, and the paper is precise about why that number: "The 1,024 line is UALink's 2^10 addressing cap, not a radix step" (p. 9).

Everything below the rack is someone else's job, on purpose. The optical faceplate is the document's decomposition point: "Specifications below the faceplate govern the OE, its packaging, its electrical interfaces, and its field-replaceable unit qualification, all of which are defined by MSAs, OIF, IEEE, and UCIe and consumed as reference by this architecture" (p. 205). External bodies are "referenced, not re-specified" (p. 111). Even the choice of light source is pushed down a level: the passive fiber plant must accommodate "silicon photonics with external lasers, VCSELs, micro-LEDs, coherent optics, and future approaches," because "technology selection is a tray-level design decision, not a platform decision" (p. 50).

The laser layer shows what that delegation is betting on. The architecture treats centralized external light as a first-class, field-replaceable service component: External Laser Source modules in a common cage contract, with OIF's ELSFP as the reference form factor and laser distribution sized by the blast radius of an outage rather than by mechanical convenience (pp. 119-122). Yet the paper's standards map names the CW-WDM MSA as the owner of external laser-source specifications (p. 207), and that group's site lists nothing newer than Rev 1.0, dated June 2021. After test, it is the softest row on the map.

"Aligning 19 companies on a system-level architectural vision was an enormous undertaking," Lightmatter founder and CEO Nick Harris said in the launch release. "This white paper lays the foundation upon which this growing OCP community will develop a shared MHS-based CPO rack architecture that fits into hyperscalers' build flows."

The stack, owner by owner

Read the map top down and the spring's apparent fragmentation (four MSAs and one OCP initiative announced over roughly two months) resolves into layering. Each effort claims a different altitude, and most of the apparent overlap disappears once they are stacked. The optical physical layer is the compute-side fabric problem Supercomputing News mapped in its analysis of co-packaged optics' two front doors; the component layer is the same connector consolidation that saw copper incumbents buy up the fiber layer in 48 hours last spring.

One membership pattern is worth noting as context. The OCI MSA announced itself on March 12; Lightmatter's OCP initiative followed on March 16. The founding groups do not overlap. OCI's six founders span merchant silicon, hyperscale operators, and a frontier-model lab. The OCP workstream's publicly named members (Celestica, Dell, Flex, Foxconn Interconnect Technology, Global Unichip, Hyve Solutions, Keysight, Lightmatter, Qualcomm, and Quanta Cloud Technology, per the launch release) come from the ODM, EMS, connector, and test-equipment supply chain; Qualcomm is the only XPU vendor among them, and Intel appears as a white-paper contributor. Of the nine companies added since March, only Global Unichip is publicly identified. A text search of the released PDF finds more than 100 references to the OCI MSA, more than any other external body; OCI's published specification predates the OCP document and does not reference it. The two efforts describe themselves as complementary, a PHY and the rack architecture that consumes it. Whether the companies that formed OCI eventually join the OCP work is the open question the rosters leave.

What's missing on the factory floor

The white paper's economics section states the stakes for the unowned row: without a photonic known-good-die methodology, "the financial risk of committing photonic chiplets to multi-die co-packaged assemblies falls entirely on the integrator" (p. 206). Defective die get found after they are bonded into an expensive multi-die package, when the whole assembly is already at risk.

Reporting published two days before the launch describes the state of practice. In SemiEngineering's August 11 account by Anne Meixner, there are no standards for connectors, product specifications, or test data formats in co-packaged optics production, "so every CPO design requires a custom solution." Dieter Rathei, CEO of DR Yield, said STDF, the industry's workhorse test-data format, "was never designed to carry a wavelength sweep or a polarization-dependent loss curve as a first-class object. So optical measurements end up flattened into scalar limits or parked in vendor-specific files, and the richness needed for real yield learning is lost before analysis even starts." Aftkar Aslam, CEO of yieldWerx, made the same point independently: "STDF was never really designed with optical measurements in mind — wavelength sweeps, far-field profiles, OSA traces, LIV curves — so every vendor invents something." Abram Detofsky, manufacturing test architect at Intel Foundry, framed standards as what lets "equipment suppliers, OSATs, foundries, and customers build interoperable solutions instead of one-off engineering setups," and Amkor's Vineet Pancholi expects them to be how customers, suppliers, and OSATs converge.

The nearest existing standards do not fill the row. The public abstract of IEEE 2427-2025 covers defect-coverage accounting for analog and mixed-signal circuits and makes no mention of photonics or optical measurands. SEMI's Silicon Photonics Industry Alliance counts more than 110 industry partners, with TSMC and ASE as alliance advocates, but it works the problem as an alliance and roadmap effort rather than a standards track.

The timing claims come from the manufacturers themselves. ASE's Nicole Tien told OCP APAC this week that shared testing standards and simulation groundwork are still missing and the ecosystem is not yet ready; ASE puts multi-vendor co-packaged optics 12 to 24 months from buyers' hands, gated on test readiness. That estimate is, in effect, the window the open standards stack has to make photonic parts testable across vendors. Ayar Labs' Vishal Chandrasekar, in the same SemiEngineering report, put near-package optics 12 to 18 months from volume production and co-packaged optics 18 to 24. The vertically integrated stack, meanwhile, ships on its own schedule. NVIDIA, whose $4 billion photonics commitment signaled its direction early, says its Spectrum-X Photonics switch has entered full production; TrendForce reports that switch is built on TSMC's COUPE process, which TSMC targets for production in 2026. None of that waits on an external test standard. Samsung's vertical-integration bet targets turnkey co-packaged optics in 2029.

The nearest thing to an owner

The paper nominates a fix for the test layer. Section 14 proposes a four-tier test regime, from foundry-level photonic known-good die through component, assembly, and system-field tiers, as a joint work item among OCP, OIF, and the Advanced Photonics Coalition (pp. 214-215). It cites JEDEC JEP173 as the silicon known-good-die precedent, apparently in error: JEP173 covers dynamic on-resistance test methods for GaN power devices, while JEDEC's known-good-die document is JESD49.

The Advanced Photonics Coalition is the notable nominee. COBO, the Consortium for On-Board Optics, renamed itself in 2023 and repositioned toward photonics manufacturing and test standardization. It already operates a Silicon Photonics Manufacturing Standards Working Group whose stated mission includes supply-chain interoperability and low-cost, high-volume manufacturing, with OSATs and test-equipment makers in its ecosystem, though its page lists no published deliverables yet.

So the open question is not whether anyone is working on photonic test standards; APC's working group exists. It is whether that work and the white paper's proposed joint program converge into a chartered effort that produces something a test floor can buy equipment against. The release says the workstream anticipates its first specification submissions in Q4 2026. Between now and then, two tells are worth watching: whether any OCI MSA principal joins the workstream before the Base Specification takes shape, and whether the manufacturing test layer's proposed owners charter the program. Appendix B gives readers a way to keep score. Watch whether that row gets a name before the first co-packaged racks need one.